Design Verification Manager, DV Manager, DV Lead, Design Verification Lead

About Our Client

Our client is an innovative semiconductor design company focused on developing advanced System-on-Chip solutions for global markets. With a strong engineering culture and a commitment to technical excellence, the company provides opportunities to work on cutting-edge architectures and collaborate with highly experienced design and verification teams.

Job Description

• Define and execute verification strategies for complex SoC and subsystem designs.
• Develop scalable and reusable UVM-based verification environments and frameworks.
• Drive verification planning, coverage modelling, regression strategies, and verification closure activities.
• Lead protocol verification activities across high-speed interfaces, memory subsystems, and on-chip interconnect architectures.
• Work closely with design, architecture, firmware, IP, and system teams to ensure product quality and verification completeness.
• Review verification plans, testbench architecture, coverage metrics, and critical deliverables.
• Manage project schedules, verification milestones, resource allocation, and execution tracking.
• Identify technical and schedule risks proactively and implement mitigation plans.
• Mentor and develop verification engineers, promoting best practices and continuous improvement.
• Drive process automation, productivity enhancements, and verification methodology improvements.

The Successful Applicant

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Minimum 7 years of experience in digital IC or SoC verification.
• Strong expertise in SystemVerilog and UVM, with hands-on experience building verification environments from the ground up.
• Proven experience leading verification efforts for complex SoC or subsystem projects.
• Deep understanding of functional coverage, assertion-based verification, regression management, and verification closure methodologies.
• Strong debugging, root-cause analysis, and problem-solving capabilities.
• Experience with simulation, emulation, and/or FPGA prototype verification flows.
• Excellent leadership, communication, and stakeholder management skills.
• Experience verifying industry-standard protocols such as:
  • AMBA (AXI, AHB, APB, ACE, CHI)
  • LPDDR4 / LPDDR5
  • HBM3 / HBM4
  • PCIe
  • UART
  • SPI
  • I3C
• Experience with Python, Perl, Tcl, or Shell scripting is highly desirable.
• Knowledge of SoC integration, cache coherency, memory architectures, and formal verification is an advantage.
• Experience managing geographically distributed verification teams is a plus.