SoC integration flow engineer

Job Description1. SoC chip integration from RTL to gate level including timing closure and DFT

2. Digital design methodology integration and QC flow improvement

LI-LL1Requirement1. Cell base IC design flow knowledge and experience

2. Digital IC design EDA tool and flow development experience

3. Basic RTL design experience and Timing / CTS / Physical concept

4. good script skill i.e. Per / Python / Tcl interested in programming

5. DFT knowledge and integration experience is plus