Design Verification Engineer
1. Verification environment development for DSP-base and peripheral IP design.
2. Functional verification from blocks to system-level
3. Develop test pattern for low power and performance analysis
4. Post-silicon debug and power / performance correlation
Requirement 1. Familiar with UVM verification methodology and flow.
2. Familiar with AMBA bus and peripheral controller(for example DMA ...), and processor is a plus
3. Familiar with SOC integration and verification flow, FPGA is a plus
4. Familiar with Perl, C, Verilog, SystemVerilog.